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Freescale Semiconductor /MK61F15WS /DDR /CR39

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Interpret as CR39

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0P0RDCNT0RESERVED0 (00)RP00RESERVED0 (00)WP00RESERVED

WP0=00, RP0=00

Description

DDR Control Register 39

Fields

P0RDCNT

Port 0 Read command Count
RESERVED

Reserved
RP0

Port 0 Read command Priority

0 (00): Highest

1 (01): -----

2 (10): -----

3 (11): Lowest
RESERVED

Reserved
WP0

Port 0 Write command Priority

0 (00): Highest

1 (01): -----

2 (10): -----

3 (11): Lowest
RESERVED

Reserved

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data